Andrew Boutros

Office: E5-4003

200 University Ave W

Waterloo, Ontario

I am an Assistant Professor of Electrical and Computer Engineering at the University of Waterloo. My research focuses on building new reconfigurable computing architectures that are more efficient, easier and faster to program, and better suited for high-demand workloads at the edge and datacenters. This involves work on architecture and circuit modeling, computer-aided design tools, and application/hardware co-design. I am particularly interested in applications from the deep learning and datacenter networking domains.

Before joining the University of Waterloo, I received my PhD in Electrical and Computer Engineering from the University of Toronto, where I was lucky to be trained by Prof. Vaughn Betz. During and before my PhD, I was a researcher at Intel Labs and Intel’s Programmable Solutions Group (now Altera). Then, I established and led the Toronto office of MangoBoost, a Seattle-based startup developing data processing units for datacenter infrastructure acceleration.

Research Interests

Efficient hardware acceleration of key applications (such as deep learning and networking) using FPGAs and other reconfigurable architectures.
Architecture of future FPGAs and beyond-FPGA reconfigurable acceleration devices that integrate traditional programmable fabrics with coarse-grained accelerators and networks-on-chip.
Applying machine learning techniques in FPGA computer-aided design tools for faster runtime and higher quality of results.

News

Aug 30, 2024	🎉 I passed my PhD final oral examination! That’s a wrap for my grad school experience :)
Jul 31, 2024	🎉 I will be joining the University of Waterloo ECE department as a tenure-track assistant professor starting January 2025!
Jun 06, 2024	🎉 I passed my PhD departmental oral examination! One defence down, one more to go :)
May 29, 2024	📜 Our work on using FPGA software-programmable overlays for accelerating of graph neural network inference is accepted for publication in FPL’24!
Mar 18, 2024	📜 Our work on FPGA-based graph neural network acceleration is accepted for a poster presentation in FCCM’24!
Dec 13, 2023	🎤 George Constantinides, Christos-Savvas Bouganis, and myself will be organizing a SpatialML Workshop at ISFPGA’24!
Dec 13, 2023	🏆 Our FPT’23 paper on 3D-stacked reconfigurable acceleration devices won best paper award!
Oct 19, 2023	📜 Our work on 3D-stacked reconfigurable acceleration devices is accepted for publication in FPT’23!
May 24, 2023	📜 Our work on the architecture exploration flow of future RADs is accepted for publication in FPL’23!
Apr 30, 2023	📜 Our book chapter on FPGA architecture is published as part of the Handbook of Computer Architecture by Springer Nature!
Apr 20, 2023	📜 Our work extending the Koios suite of deep learning FPGA benchmark circuits is accepted for publication in TCAD!
Mar 17, 2023	📜 Our work on placement optimization for FPGAs with embedded hard NoCs is accepted for publication as a full paper in FCCM’23!
Sep 05, 2022	📜 Our work on flexible FPGA-based acceleration of NLP models (BERT, GPT) is accepted for publication in TACO!
Aug 29, 2022	📜 Our journal paper on architecture and application co-design for new beyond-FPGA devices is accepted for publication in IEEE Access!
Jul 03, 2022	📜 Our paper on FPGA smart NICs for AI training is accepted for publication in the IEEE Computer Architecture Letters!
Jun 14, 2022	📜 Our paper on architecture exploration for novel beyond-FPGA reconfigurable acceleration devices is accepted for publication in FPL’22!
Dec 22, 2021	🏆 Our paper on specializing AI FPGA overlays won one of the best paper awards in ICM’21!
Oct 17, 2021	📜 Our work on specializing AI overlays for target workloads is accepted for publication in ICM’21!
May 25, 2021	📜 Our survey on the principles and progression of FPGA architecture is published in the IEEE Circuits and Systems magazine!
May 14, 2021	📜 Two full papers accepted for publication in FPL’21!
Apr 13, 2021	🎉 Our work on the Stratix 10 NX neural processing unit is featured on Intel’s Stratix 10 NX official webpage and in this white paper!
Mar 08, 2021	📜 Our work on enhancing FPGAs with in-BRAM compute for deep learning was accepted for publication as a full paper in FCCM’21!
Dec 09, 2020	🏆 Our paper on deep learning security in multi-tenant cloud FPGAs was nominated for the best paper award in FPT’20!
Nov 01, 2020	📜 Two full papers accepted for publication in FPT’20! Too bad I cannot visit Hawaii during the COVID-19 pandemic!
Apr 10, 2020	📜 Our work on optimizing FPGA logic blocks for deep learning arithmetic was accepted for publication in TRETS!
Mar 24, 2020	🎉 I am honored to join the Vector Institute as one of 22 post-graduate affiliates across Canada in the 2020 cohort (Announcement).
Oct 06, 2019	📜 Our work on multi-FPGA acceleration of neural machine translation acceleration was accepted for publication in FPT’19!
Mar 03, 2019	📜 Our work on FPGA and ASIC integration for persistent RNNs was accepted for publication in FCCM’19!
Nov 15, 2018	📜 Our work on FPGA logic blocks for low-precision deep learning was accepted for publication in FPGA’19.
Nov 15, 2018	📜 Our work on evaluating and enhancing Intel Stratix 10 FPGAs for persistent AI was accepted for a poster presentation in FPGA’19.
Aug 31, 2018	🏆 Our paper on low-precision DSP blocks for deep learning won the S. Vassiliadis Best Paper Award in FPL’18!
Aug 08, 2018	🎉 I successfully defended my MASc thesis titled “Enhancing FPGA Architecture for Efficient Deep Learning Inference”!
Jul 25, 2018	📜 Our work on quantifying the efficiency gap between FPGA and ASIC CNN accelerators was accepted for publication in TRETS.
May 21, 2018	📜 Our work on low-precision DSP blocks for deep learning was accepted for publication in FPL’18.
Apr 21, 2018	🏆 I won the University of Toronto Right Track CAD Graduate Scholarship for research excellence in the field of programmable logic.
Feb 01, 2018	🎉 I am thrilled to join the Vector Institute as a post-graduate affiliate in the 2018 cohort (Announcement).

Selected Publications

Beyond Peak Performance: Comparing the Real Performance of AI-Optimized FPGAs and GPUs

Andrew Boutros, Eriko Nurvitadhi, Rui Ma, Sergey Gribok, Zhipeng Zhao, James C Hoe, Vaughn Betz, and Martin Langhammer

In IEEE International Conference on Field-Programmable Technology (FPT), 2020

Featured on Intel’s Webpage & Whitepaper PDF Video
FPGA Architecture: Principles and Progression

Andrew Boutros, and Vaughn Betz

In IEEE Circuits and Systems Magazine (CAS-M), 2021

PDF
Architecture and Application Co-Design for Beyond-FPGA Reconfigurable Acceleration Devices

Andrew Boutros, Eriko Nurvitadhi, and Vaughn Betz

In IEEE Access, 2022

PDF
Into the Third Dimension: Architecture Exploration Tools for 3D Reconfigurable Acceleration Devices

Andrew Boutros, Fatemehsadat Mahmoudi, Amin Mohaghegh, Stephen More, and Vaughn Betz

In IEEE International Conference on Field Programmable Technology (FPT), 2023

Best Paper Award PDF
Placement Optimization for NoC-Enhanced FPGAs

Srivatsan Srinivasan, Andrew Boutros, Fatemehsadat Mahmoudi, and Vaughn Betz

In IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM), 2023

Best Paper Nomination PDF