Milo Liebster
Undergraduate Research Student
Bio
Milo is a third-year student studying Computer Engineering at the University of Waterloo. Their personal areas of interest revolve around digital hardware, computer architecture, FPGA architecture, and low-level/systems programming. Milo’s co-operative work term experiences have focused on FPGA technology, including VHDL and embedded contributions to AV over IP streaming devices at Evertz Microsystems, as well as development of fabrication defect coverage tests for next generation Microchip FPGA devices. Presently, Milo is completing an Undergrad Research Apprenticeship under Andrew Boutros, working on new packing algorithms in the Verilog to Routing (VTR) FPGA toolflow.